Comparator/DAC Combinations Solve Data-Acquisition Problems - AN647
ثبت نشده
چکیده
The following discussion examines an overlooked option for many existing A/D converter applications: the A/D conversion is sometimes better implemented with a discrete comparator and D/A converter. This substitution generally entails a different measurement approach, but the advantages can include lower cost, higher speed, more flexibility, and lower power consumption. Current trends, though, are in the other direction—designers who must implement A/D conversion usually specify a packaged A/D converter (ADC) for the job. Most engineers are not aware of an alternative, and the price/performance ratios for ADCs are falling all the time. Yet, an analog comparator plus D/A converter (DAC), along with digital processing capability, form the core of a successive-approximation ADC. The discrete comparator/DAC approach is already common in certain fields. Automatic test equipment, nuclear pulse-height discriminators, and automated time-domain reflectometers often use the technique whereby one comparator input is driven by the DAC, and the other is driven by the signal to be monitored. Following is a selection of general measurement problems and specific applications in which a comparator/DAC combination is actually more appropriate than an off-the-shelf ADC. Transient Voltage Analysis A brute-force technique for capturing fast-changing amplitude events (transients) is simply to digitize them with a high-speed ADC supported by a processor and fast RAM (Figure 1). Single-shot events may compel the use of this approach, as may the need to discern fine detail in the transients. Otherwise, if the transients are repetitive, you can measure their peak amplitude and other features with the DAC/comparator approach (Figure 2). Figure 1. As the brute-force approach to transient analysis, an ADC circuit is power-hungry and expensive.
منابع مشابه
2MS/s SPLIT SAR ADC USING 0.18um CMOS TECHNOLOGY
This paper focuses on Design and Implementation of 10 Bit, 2MS/s successive approximation Register (SAR) Analog to digital converter (ADC) using Split DAC architecture. This SAR ADC architecture is designed and simulated using GPDK 0.18um CMOS technology. It consists of different blocks like sample and hold, comparator, Successive Approximation Register (SAR) and Split Digital to analog convert...
متن کاملA 10-bit 100-kS/s Successive Approximation Register ADC with improved Split Capacitor-based DAC
A 10-bit 100-kS/s successive approximation register (SAR) analogto-digital converter (ADC) with rail-to-rail input range is proposed for a low power sensor interface. It consists of a time-domain comparator, a split capacitor-based digital-to-analog converter (SC-DAC) and a SAR logic. The time-domain comparator with an offset calibration technique is used to achieve a resolution of 10-bit. To r...
متن کاملDesign of Current steering DAC using 250nm CMOS Technology
To build a digital to analog converter, that only receives digital signal that can only receives digital signal and produces only analog signal. A converter in which digital input signals are changed to essentially proportional analog signals. Abbreviated DAC a device for converting information in the forms of combination of discrete(usually binary) states or signal to information in the form o...
متن کاملBackground Calibration Techniques for Low-Power and High-Speed Data Conversion
Progress of roles and schemes of calibration techniques in data converters are reviewed. Correction techniques of matching error and nonlinearity in analog circuits have been developed by digital assist using high-density and low-power digital circuits. The roles of the calibration are not only to improve accuracy but also to reduce power dissipation and chip area. Among various calibration sch...
متن کاملLow-Power Architectures and Self-Calibration Techniques of DAC for SAR-ADC implementation
SAR-ADC is best suited for low power applications where power has a trade-off with speed. Use of redundant circuitry reduces the on chip area making it cost effective. DAC is one of the components of SAR-ADC that introduces error voltage due to mismatch and consumes large power other than comparator. Low power DAC architectures have been studied and analysed. To account for capacitor mismatch i...
متن کامل